Wondermedia WM8505 True Specs


Senior Member
Aug 4, 2010
Released 9/09

Figure 1 - WM8505 System Block Diagram

Data Sheet
WM8505 Application Processor
Product Features
Scalable Powerful RISC Core
Built-in Versatile Peripherals
Performance-enhanced JPEG Decoder
Simplified Design/Development with Low System BOM

– ARM (Advanced RISC Microelectronics) 926EJ-S RISC Processor with MMU,
16k Bytes Instruction Cache and 16k Bytes Data Cache
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Senior Member
Aug 4, 2010
Data Sheet
WM8505 Application Processor
WM8505 System Overview
The WM8505 Application Processor is the SoC solution with superior networks and display capabilities that specially tailored for cost-effective embedded multimedia devices. The WM8505 supports display resolution
up to 1024x600 and 10/100 Ethernet MAC. The WM8505 is a low power consumption SoC solution that demands 1.8V for DDR2 SDRAM, and 3.3 V for other interfaces as operating power. The WM8505 integrates multimedia features and functionalities, e.g. decoding popular audio/video streams, 2D graphics display, and peripheral I/Os that are aiming to meet upcoming market demands as well as reduce customer’s total
BOM cost. The WM8505 is designed to deliver the state-of-the-art performance for applications such as Networked Projector, Digital Signage, and Thin-Client Terminal.
The WM8505 Application Processor integrates all popular peripherals in an efficiently architected RISC (reduced instruction set computer) platform. Figure 1 illustrates the system block diagram of WonderMedia's WM8505 Application Processor.

Data Sheet
WM8505 Application Processor
Figure 2 illustrates the software architecture of the WM8505 Application Processor. The WM8505 supports
Linux and Windows CE for embedded systems. WonderMedia provides the software package that includes
device drivers for multimedia, peripheral, and security-related devices as well as multimedia player with
high audio, video, and image quality. The software architecture of WM8505 can easily collaborate with the
3rd party software packages to provide versatile applications
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Senior Member
Aug 4, 2010
Data Sheet
WM8505 Application Processor

– Supports 32 Mb – 32 Gb Flash
– Supports up to 8-pcs Flash Chips
– Allows Different Memory Type for Each Channel
– Supports Both 8-bit and 16-bit Flash
– Built-in Hardware 4-bit/8-bit ECC Correction for MLC Device and 1-bit ECC Correction for SLC
Device (512-bytes ECC Calculation)
– Configurable Timing Parameters
– Supports Multi-Sector Read Operation
– Supports High-Speed Programming (multi-block erase and multi-block program)

– Supports One SD/SDIO/MMC Interface
– SD Memory Card Spec. 2.0 / SDIO Spec. 1.0 / MMC Spec. 4.2 Compatible
– All SD Bus Modes Supported, Including SPI, 4-bit and 1-bit SD
– SD and MMC Support Different Clock Rate from 390 kHz to 52 MHz
– Supports CE-ATA Interface (compatible with MMC Version 4.2)
– Supports High Capacity Cards

– Supports 2 USB Host Ports and One Device Port
– USB2.0/EHCI 1.0/UHCI1.1d Specification Compliant
– Integrated Root Hub with 2 Ports
– Support High/Full/Low Speed Devices
– USB2.0 UTMI Compliant

– 802.3x Full Duplex Flow Control and Half Duplex Force Jam Capable
– MII Interface for External Ethernet PHY Support
– RevMII Interface for Switch Connectivity (Reverse MII)

– Three SPI Channels
– Industry Standard Serial Peripheral Interface
– Master and Slave SPI Modes Supported
– All Channels Support Master Modes and Slave Mode 0 and 2
– Four Signal Interfaces for each Port – Clock, Select, Transmit Data and Receive Data
– Full Duplex Synchronous Serial Data Transfer
– Programmable Clock Phase and Polarity
– Programmable Asynchronous Transmission Speed up to 100 MHz

– Up to Six Half UARTs or Four Full UARTs Supported. One UART Port with Additional Support for
IrDA Version 1.0 Short Range Infrared Communication
– 16C550 Compliant UARTs with Baud Rate Support from 900 to 921.6k bps (2.4k to 115.2k bps
for IrDA)
– DMA Data Transfer Capability Using the on-chip System DMA Controller
– RTS and CTS Modem Handshake Control Signals for Each UART when IrDA is not Used
– Supports Bluetooth UART HCI Communication Break Signal Generation

– Two I2C Ports Supported
– 100k bps Standard Mode plus 400k bps Fast Mode
– 7-bit Address
– Signal-master (Multi-master not Supported)
– Supports Slave Mode in one of the I2C Ports
– Software Programmable Clock Frequency and Acknowledge Bit
– Interrupt Driven Data Transfer

– Supports AES-128 Encryption / Decryption with ECB/CBC/CTR/OFB Mode
– Supports SHA-1 (Secure Hash Algorithm) Hash Function
– Supports RC4 Decryption
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Senior Member
Aug 4, 2010
Data Sheet
WM8505 Application Processor

– Supports up to 8x8 Key Matrix if CCIR601/656 Digital Video Input Interface and One of the I2C
Serial Ports (I2C1x) are not Used

– PS/2 & AT Keyboard and Mouse Supported
– Intel 8042 Controller Compatible
– Wakeup from Suspend Supported
– Support Keyboard/Mouse Interface swapping

– Supports NEC, Sony, Matsushita, and JVC Code Formats

– 2 PWM Timers that may be Used as either PWM Timers or Simple System Timers
– 2 PWM Timer Outputs to External Logic

– 8 Dedicated General Purpose I/Os with Level/Edge Sensitive Interrupt Requests
– Other Multiplexed GPIO Signals Allow One or More Peripherals to be Disabled for Multiplexed
GPIO Signal Sections

– Support for up to 128 Interrupt Sources
– Generates Interrupt and Fast-Interrupt to ARM
– Interrupt Status Registers for Every Interrupt Output
– Fixed and Rotating Priority Schemes
– 16 External Interrupt Sources through GPIO Pins that are Edge or Level Sensitive

– 16 Channels
– Supports Scatter-Gather DMA Operation
– Memory-to-Peripheral Transfers, Peripheral-to-Memory Transfers and Memory-to-Memory
Transfers Supported
– 1-, 4-, and 8- Transfer Burst Sizes and 8 / 16 / 32-Bit Data Widths
– Supports Dual DMA Buffers in Ping-Pong Fashion

– With on-chip Low Power 32.768 kHz Oscillator Requiring only a Crystal
– Supports Time, Date and Day-of-the-week
– Provides Time and Date in 24-hour or 12-hour Format with an AM/PM Flag
– Encodes the Seconds, Minutes, Hours, Days, Months and Years in BCD Format
– Calendar Function with Correction for Leap Year
– Time Calibration (Providing a Time Correction Mechanism)
– Programmable Alarm with Interrupt Request Generation
– Second / Minute Updating Interrupt Request Generation

– Supports Four Operating Modes: Normal, Idle, Sleep and Suspend
– Gate-off Function of Peripheral Clocks to Put Unused Peripherals in Low Power Mode

– Built-in PLLs to Provide Various Clock Frequencies
– Internal Oscillator – Only One 27 MHz Crystal is Needed Externally

– Generates Periodic Interrupts for System Purposes
– Generates Watchdog Reset

– In Compliance with IEEE 1149.1
– All Internal Memory with BIST

– Commercial Grade: Ranges from 0°C to 70°C


Senior Member
Aug 4, 2010
Data Sheet
WM8505 Application Processor

– Embedded Linux
– Windows CE
– Device Drivers for Internal Peripherals
– Supporting Binary Library, i.e. Linux Loadable Modules
– Porting Guide
– Sample Applications for Chip Validation, System H/W Evaluation, and Reference Design
– Application Shell
– Media Player
– Image Viewer
– System Setup Utilities
– API, SDK, and Application Sample Codes